Hardware Description and VerificationCourse descriptionThe aim of the course is to give a flavour of some industrially applied methods for description and verification of hardware, as well as some of the research in the area. You will be exposed to two different hardware description languages, and to associated verification methods, both in theory and in practice. All lectures will be given in English. The course consists of lectures, labs and take-home assignments. In this course a greater emphasis will be placed on working independently than you may be used to.
The rationale behind the course is described in our 2-page paper
(copyright IEEE): The examination consists of 3 parts: two Take-Home Exams, and one written exam. The take home exams will each contribute 25% to your final grade, but you must also pass both of them. The written exam will contribute the remaining 50%, and you must also pass it. You must also pass the labs. A short note on cheating: The solutions you submit must be all your own work. Submitting code which is in whole or in part the work of another lab group (or anyone else) counts as cheating in an exam, and the penalties are potentially severe. It is important that you read this page on Cooperation vs. Cheating before you begin any lab exercises or take home exams. Masters projectsIf you find all or part of this course interesting, do not hesitate to approach us about masters projects. We usually run a few research-oriented projects after the course. A list of projects will be made available towards the end of the course, if there seems to be any demand for such a thing.People InvolvedTeachers:
Student Representatives:
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