I am a PhD student at Chalmers University of Technology, adviced by Magnus Myreen, working in interactive theorem proving (HOL4, to be precise) and hardware verification.
“Lutsig: A Verified Verilog Compiler for Verified Circuit Development” (local copy, video) at CPP'21, by Andreas Lööw
“Verified Compilation on a Verified Processor” (1 minute video abstract) at PLDI'19, by Andreas Lööw, Ramana Kumar, Yong Kiam Tan, Magnus O. Myreen, Michael Norrish, Oskar Abrahamsson, and Anthony Fox
“A Proof-Producing Translator for Verilog Development in HOL” at FormaliSE'19, by Andreas Lööw and Magnus O. Myreen
Office: Rännvägen 6B, EDIT building, room 5471 (5th floor)
Teaching assistant for: “Formal methods for software development”, “Programming language technology”, and “Principles of concurrent programming”
Other places: GitHub and LinkedIn