”T800, THOR and SPARC, a
performance analysis”
This document discusses six computer designs using the T800 Transputer, the
SAAB Thor and the Cypress SPARC microprocessors respectively. The purpose is to
evaluate hardware aspects of the three processors in two different configurations,
a minimum configuration and a maximum configuration. The "paper
designs" are indented to give an estimation of:
·
maximum possible instruction execution rate
·
required
number of devices
·
area of
printed circuit board
·
power
consumtion
·
failure rate
The
following tables summarises the results:
SMALL
CONFIGURATION
|
T800 |
THOR |
SPARC |
|
|
5.0 |
7.8 |
7.5 |
Mixed instruction
execution rate (MmixedIPS) |
|
32 |
24 |
31 |
Number
of required devices |
|
10307 |
7844 |
12134 |
Total
area for devices (mm2) |
|
11500 |
9000 |
13500 |
Total
PCB area (mm2) |
|
6605 |
7770 |
11914 |
Total
power requirement (mW) |
|
3079 |
2320 |
3453 |
Failure
Intensity (FITS) |
MAXIMUM
CONFIGURATION
|
T800 |
THOR |
SPARC |
|
|
8.5 |
10 |
23 |
Mixed instruction
execution rate (MmixedIPS) |
|
21 |
19 |
23 |
Number
of required devices |
|
7730 |
8289 |
12785 |
Total
area for devices (mm2) |
|
8500 |
9100 |
14100 |
Total
PCB area (mm2) |
|
26114 |
26020 |
36190 |
Total
power requirement (mW) |
|
119576 |
104767 |
169453 |
Failure
Intensity (FITS) |