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GPU Software Transactional Memory

Daniel Cederman, Philippas Tsigas

PresentationPapers | Back to Research

The introduction of general purpose computing on many-core graphics processor systems, and the general shift in the industry towards parallelism, has created a demand for ease of parallelization. Software transactional memory (STM) simplifies development of concurrent code by allowing the programmer to mark sections of code to be executed concurrently and atomically in an optimistic manner. In contrast to locks, STMs are easy to compose and do not suffer from deadlocks. We have designed and implemented two STMs for graphics processors, one blocking and one non-blocking. The design issues involved in the development of these two STMs are described and explained and are presented together with experimental results comparing the performance of the two STMs [1].

Presentation

This presentation was given at the Eurographics Symposium on Parallel Graphics and Visualization (EGPGV) in 2010.

Papers

[1] Daniel Cederman, Philippas Tsigas and Muhammad Tayyab Chaudhry, Towards a Software Transactional Memory for Graphics Processors, in the Proceedings of the 10th Eurographics Symposium on Parallel Graphics and Visualization (EGPGV 2010). [pdf]



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