e Hardware Description and Verification
Hardware Description and Verification TDA956, LP4, VT2008

Schedule
Monday
13 - 15
Tuesday
13-15
Thursday
10 - 12
1.
31/3 - 4/4
no lecture. Course begins tomorrow!
Course Introduction in ES51
Course overview by MS
Intro. to industrial formal verification using JasperGold by ØK
in ES51 by MS
Intro. to formal hardware verification
2.
7/4 - 11/4
in ES51 by MS
Specifying circuit properties I
in ES51 by MS
Specifying circuit properties II
in ES51
Exercises
3.
14/4- 18/4
in ES51 by CS
FV at Intel
See paper by Seger on Formal Hardware Verification
in ES51 by MS
Model Checking 1
in ES51 by MS
Model Checking 2
Read the six page paper Formal Hardware Verification with BDDs: An Introduction by Alan J. Hu
Lab Deadline I

4.
21/4 - 25/4
no lecture
in ES51 by MS
SAT, BMC etc.
in ES51
Exercises
Exam Deadline I

5.
28/4 - 2/5
in ES51 by MS
Lava 1
in ES51 by MS
Lava 2
1 May, no lecture

6.
5/5 - 9/5
in VD (by MS)
Lava 3

in ES51
Exercises
in ES51 by WK
SoC Verification in practice

7.
12/5 - 16/5
in ES51 by MS
Lava 4

in ES51
Exercises
No lecture

Lab Deadline II

8.
19/5 - 23/5
in ES51 by SS
Compiling parallel programs into circuits
in ES51 by EA/JS
Wired and Obsidian
No lecture

Exam Deadline II


Home | Schedule | Literature | Assignments | Tools | Links | Course M. Sheeran, E. Axelsson, J. Svensson March 4, 2008