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yiannis

Contact Info

Ioannis Sourdis
Associate Professor

Computer Engineering Division
Computer Science Engineering Department
Chalmers University of Technology
412 96 Gothenburg
Sweden
sourdis at institution dot se
+46 31 772 1744 office
+46 31 772 3663 fax
Rännvägen 6, 4th floor, E/D/IT (D&IT), room no. 4110

Research Interests:

    • Architectures and Design of Computing systems
    • Network Processing
    • Network Security, Intrusion Detection, Content Inspection, Pattern Matching
    • IP-Lookup, Packet Classification
    • Reconfigurable Computing
    • Fault-Tolerant Computing
    • Interconnection Networks and Networks-on-Chip
    • Multicore Architectures

Research Projects:

Current:

Past:

    • DeSyRe: on-Demand System Reliability, European FP7 project, 2011-2015
    • STW Valorisation grant (Dutch) for the Range Trie invention 2010
    • HiPEAC coordination of the Reconfigurable Computing research cluster 2007-2010, (PI: G. Gaydadjiev).
    • SARC: Scalable Computer Architecture, FP6 EU project (IP FET), 2006-2010 (PI: G. Gaydadjiev).
    • EASY: Energy-aware System-on-Chip design of the HIPERLAN/2 standard, FP5 EU project, 2003-2004 (PI: D. Pnevmatikatos).
    • Pro3: The Protocol Processor Project, FP5 EU project, 2000-2002 (PI: D. Pnevmatikatos).

Awards:

    • Award for co-authoring one of the most significant FPL papers (in the 25 years history of the conference), that most strongly influenced theory and practice in the field, 2015. For the paper: I. Sourdis and D.N. Pnevmatikatos, "Fast, Large-Scale String Match for a 10Gbps FPGA-based Network Intrusion Detection System", 13th Int. Conf. on Field Programmable Logic and Applications (FPL), pp. 880889, 2003.
    • Second price on the IEEE FPT Design Competition, 2009.

Other:

2011 Ioannis Sourdis